Quake's Texture Mapping

The floating point pipeling code for the texture mapping inner loop described in the articles exploits the fact that the P5 architecture allows for scheduling integer and floating operations in parallel, and effectively reduces computation to 4 cycles/pixel in best case.
The article series does not mention Quake, and the details of the implementation id's rasterizer is acutally using might differ. In his CGDC talk, Michael Abrash stated that screen gradients for texture coordinates and 1/z are used to calculate perspective correct texture coordinates every 8 or 16 pixels, and linear interpolation is used between those points. He characterized the loop to be 100% floating-point down to the 8 or 16 pixel subdivisions, and mentions overlapping FDIV. In summary, their inner loop is clearly faster in floating-point on Pentium than it would be in fixed-point.
Btw., the z-fill that is done by the Quake rasterizer while processing world BSP polygons is not done within the same loop as the perspective texture mapping, because of the ever present lack of general purpose registers on the Intel x86 architecture, as pointed out to me by Chris Hecker and confirmed by John Carmack.